cpu: implements vector registers
authorNilay Vaish <nilay@cs.wisc.edu>
Sun, 26 Jul 2015 15:21:20 +0000 (10:21 -0500)
committerNilay Vaish <nilay@cs.wisc.edu>
Sun, 26 Jul 2015 15:21:20 +0000 (10:21 -0500)
commit608641e23c7f2288810c3f23a1a63790b664f2ab
tree0656aaf9653e8d263f5daac0d5f0fe3190193ae5
parent6e354e82d9395b20f5f148cd545d0666b626e8ac
cpu: implements vector registers

This adds a vector register type.  The type is defined as a std::array of a
fixed number of uint64_ts.  The isa_parser.py has been modified to parse vector
register operands and generate the required code.  Different cpus have vector
register files now.
55 files changed:
src/arch/SConscript
src/arch/alpha/isa.hh
src/arch/alpha/registers.hh
src/arch/alpha/utility.cc
src/arch/arm/insts/static_inst.cc
src/arch/arm/isa.hh
src/arch/arm/registers.hh
src/arch/arm/utility.cc
src/arch/isa_parser.py
src/arch/mips/isa.hh
src/arch/mips/registers.hh
src/arch/mips/utility.cc
src/arch/null/registers.hh
src/arch/power/insts/static_inst.cc
src/arch/power/isa.hh
src/arch/power/registers.hh
src/arch/power/utility.cc
src/arch/sparc/isa.hh
src/arch/sparc/registers.hh
src/arch/sparc/utility.cc
src/arch/x86/insts/static_inst.cc
src/arch/x86/isa.hh
src/arch/x86/registers.hh
src/arch/x86/utility.cc
src/cpu/StaticInstFlags.py
src/cpu/base_dyn_inst.hh
src/cpu/checker/cpu.hh
src/cpu/checker/cpu_impl.hh
src/cpu/checker/thread_context.hh
src/cpu/exec_context.hh
src/cpu/minor/dyn_inst.cc
src/cpu/minor/exec_context.hh
src/cpu/minor/scoreboard.cc
src/cpu/minor/scoreboard.hh
src/cpu/o3/O3CPU.py
src/cpu/o3/cpu.cc
src/cpu/o3/cpu.hh
src/cpu/o3/dyn_inst.hh
src/cpu/o3/free_list.hh
src/cpu/o3/inst_queue_impl.hh
src/cpu/o3/regfile.cc
src/cpu/o3/regfile.hh
src/cpu/o3/rename_impl.hh
src/cpu/o3/rename_map.cc
src/cpu/o3/rename_map.hh
src/cpu/o3/thread_context.hh
src/cpu/o3/thread_context_impl.hh
src/cpu/reg_class.cc
src/cpu/reg_class.hh
src/cpu/simple/base.hh
src/cpu/simple_thread.hh
src/cpu/static_inst.hh
src/cpu/thread_context.cc
src/cpu/thread_context.hh
src/sim/insttracer.hh