intel: Make the length for PIPE_CONTROL explicit.
authorKenneth Graunke <kenneth@whitecape.org>
Thu, 26 Jul 2012 18:41:26 +0000 (11:41 -0700)
committerKenneth Graunke <kenneth@whitecape.org>
Wed, 8 Aug 2012 16:23:57 +0000 (09:23 -0700)
commit61d0b9f52c6be4a4a64c30ea3a2a93ef8260c67b
tree2a3df54a8fdefeae4a523636f58d928bcab5b344
parentecac178aa2591afc36e5d34d11a773ff07cb71b1
intel: Make the length for PIPE_CONTROL explicit.

PIPE_CONTROL has variable length, depending upon generation and whether
we want to do 32-bit or 64-bit data writes.  Make it explicit, rather
than hiding a length of 4 in the #define for _3DSTATE_PIPE_CONTROL.

Generated by s/3DSTATE_PIPE_CONTROL/3DSTATE_PIPE_CONTROL | (4 - 2)/g.
This is equivalent since the #define used to have | 2 in it.  A grep
through the sources shows that all instances have been converted, so
it's safe to remove the | 2 from the #define.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
src/mesa/drivers/dri/i965/brw_queryobj.c
src/mesa/drivers/dri/i965/gen6_vs_state.c
src/mesa/drivers/dri/intel/intel_batchbuffer.c
src/mesa/drivers/dri/intel/intel_reg.h