aarch64: Add LSE128 instruction operand support
authorVictor Do Nascimento <victor.donascimento@arm.com>
Mon, 30 Oct 2023 11:47:23 +0000 (11:47 +0000)
committerVictor Do Nascimento <victor.donascimento@arm.com>
Tue, 7 Nov 2023 21:53:59 +0000 (21:53 +0000)
commit6219f9dae7d04b52ef171e0aa3341bf977b05a68
treed228c4c76f5941fbcfa736fcc3584f0d7d523893
parentecd4c78dddefe41d9fc7b947fdf4e76b743b2b02
aarch64: Add LSE128 instruction operand support

Given the particular encoding of the LSE128 instructions, create the
necessary shared input+output operand register description and
handling in the code to allow for the encoding of the LSE128 128-bit
atomic operations.

gas/ChangeLog:

* config/tc-aarch64.c (parse_operands):

include/ChangeLog:

* opcode/aarch64.h (enum aarch64_opnd):

opcodes/ChangeLog:

* aarch64-opc.c (fields):
(aarch64_print_operand):
* aarch64-opc.h (enum aarch64_field_kind):
* aarch64-tbl.h (AARCH64_OPERANDS):
gas/config/tc-aarch64.c
include/opcode/aarch64.h
opcodes/aarch64-opc.c
opcodes/aarch64-opc.h
opcodes/aarch64-tbl.h