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(parent: c9cf087) | patch
add means to run an external core from a verilog file.
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Mon, 3 Jan 2022 22:21:19 +0000 (22:21 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Mon, 3 Jan 2022 22:21:19 +0000 (22:21 +0000)
commit62327d932161b97257ab8442407ea52e479f11e7
treee463f0267460c1b74e8578d95b6d2b597155cd30tree
parentc9cf087ddd9d0d49bab1fa46af7657766d1c6eb2commit | diff
add means to run an external core from a verilog file.
basically turns soc.vhdl (etc) into a mini general-purpose fabric
interconnect (oh and allows Libre-SOC to use it)
Makefile diff | blob | history
core_dummy.vhdl [new file with mode: 0644] blob
fpga/top-generic.vhdl diff | blob | history
soc.vhdl diff | blob | history