add outer-inner RADIX2 iDCT unit test.
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 31 Jul 2021 16:27:20 +0000 (17:27 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 31 Jul 2021 16:27:24 +0000 (17:27 +0100)
commit623bdfe4a2c3d511a1fb99555001abfc2ab6ddd7
treef52140789609a8b67d5dd5e18eeb17362d84bf75
parentc065efd11dfb1b1876eb821316315fa96cce52ff
add outer-inner RADIX2 iDCT unit test.
use FFT twin +/- MUL-ADD-SUB rather than the DCT +/- MUL-ADD-SUB
openpower/isa/simplev.mdwn
src/openpower/decoder/isa/remap_dct_yield.py
src/openpower/decoder/isa/svshape.py
src/openpower/decoder/isa/test_caller_svp64_dct.py