Aarch64 SVE pseudo register support
authorAlan Hayward <alan.hayward@arm.com>
Thu, 19 Oct 2017 15:35:35 +0000 (16:35 +0100)
committerAlan Hayward <alan.hayward@arm.com>
Thu, 7 Jun 2018 09:31:41 +0000 (10:31 +0100)
commit63bad7b636870e3a0af4fc97cc2b8ec5c2603a41
tree1d6aee5c16c6d78d32702392a701561826c6a527
parent066b621238bb79de517564284ec58e99fb33e6bd
Aarch64 SVE pseudo register support

Add the functionality for reading/writing pseudo registers.

On SVE the V registers are pseudo registers. This is supported
by adding AARCH64_SVE_V0_REGNUM.

* aarch64-tdep.c (AARCH64_SVE_V0_REGNUM): Add define.
(aarch64_vnv_type): Add function.
(aarch64_pseudo_register_name): Add V regs for SVE.
(aarch64_pseudo_register_type): Likewise.
(aarch64_pseudo_register_reggroup_p): Likewise.
(aarch64_pseudo_read_value_2): Use V0 offset for SVE
(aarch64_pseudo_read_value): Add V regs for SVE.
(aarch64_pseudo_write_2): Use V0 offset for SVE
(aarch64_pseudo_write): Add V regs for SVE.
* aarch64-tdep.h (struct gdbarch_tdep): Add vnv_type.
gdb/ChangeLog
gdb/aarch64-tdep.c
gdb/aarch64-tdep.h