execute1: Handle interrupts during sequences of load/store operations
authorPaul Mackerras <paulus@ozlabs.org>
Wed, 26 May 2021 07:34:12 +0000 (17:34 +1000)
committerPaul Mackerras <paulus@ozlabs.org>
Tue, 10 Aug 2021 09:18:45 +0000 (19:18 +1000)
commit64e3ce713428bdb6a52e2e4e73afcf26d3b2751e
treef4a3d0888ce7fed607a408249d2111a90bfc78ab
parentc198b2b82ee8c21046ab1e330970d8bc98cc41db
execute1: Handle interrupts during sequences of load/store operations

At present the logic prevents any interrupts from being handled while
there is a load/store instruction (one that has unit=LDST) being
executed.  However, load/store instructions can still get sent to
loadstore1.  Thus an instruction which should generate an interrupt
such as a floating-point unavailable interrupt will instead get
executed.

To fix this, when we detect that an interrupt should be generated but
loadstore1 is still executing a previous instruction, we don't execute
any new instructions, and set a new r.intr_pending flag.  That results
in busy_out being asserted (meaning that no further instructions will
come in from decode2).  When loadstore1 has finished the instructions
it has, the interrupt gets sent to writeback.  If one of the
instructions in loadstore1 generates an interrupt in the meantime, the
l_in.interrupt signal gets asserted and that clears r.intr_pending, so
the interrupt we detected gets discarded.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
common.vhdl
execute1.vhdl
loadstore1.vhdl