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(parent: 5e79763) | patch
bigint shuffle
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 22 Oct 2022 16:15:17 +0000 (17:15 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 22 Oct 2022 16:15:20 +0000 (17:15 +0100)
commit661c5a0aedecea23f6a4770ef574f796a3dd2289
tree02ffa9aa849d4859199ad0f2eddead2fb5208494tree
parent5e79763394241cfcc2429d7be349d86be177448dcommit | diff
bigint shuffle
* divmod2du moves to XO=58 (from XO=52)
* dsld/dsrd become Rc=1 and move to XO=52-55 in VA2-Form
* dsld/dsrd pseudocode no longer is overwrite with "sm" mode
* Z23 "sm" removed from fields.txt
openpower/isa/svfixedarith.mdwn diff | blob | history
openpower/isatables/RM-1P-2S1D.csv diff | blob | history
openpower/isatables/RM-1P-3S1D.csv diff | blob | history
openpower/isatables/fields.text diff | blob | history
openpower/isatables/minor_31.csv diff | blob | history
openpower/isatables/minor_4.csv diff | blob | history
src/openpower/decoder/power_decoder2.py diff | blob | history
src/openpower/sv/trans/svp64.py diff | blob | history
src/openpower/sv/trans/test_pysvp64dis.py diff | blob | history
src/openpower/test/bigint/bigint_cases.py diff | blob | history