add VexRiscv support (imported/adapted from misoc)
authorDolu1990 <charles.papon.90@gmail.com>
Wed, 9 May 2018 12:31:05 +0000 (14:31 +0200)
committerFlorent Kermarrec <florent@enjoy-digital.fr>
Wed, 9 May 2018 13:03:37 +0000 (15:03 +0200)
commit66229c8c05b0c61d9aa9a92c69d94c98c6df1c39
tree1233f1440d116f955268e23399d2f97289201c8f
parentf60da4a5dcb00366f45e8423ab42d4bfa38051eb
add VexRiscv support (imported/adapted from misoc)
14 files changed:
litex/soc/cores/cpu/vexriscv/__init__.py [new file with mode: 0644]
litex/soc/cores/cpu/vexriscv/core.py [new file with mode: 0644]
litex/soc/integration/cpu_interface.py
litex/soc/integration/soc_core.py
litex/soc/software/bios/Makefile
litex/soc/software/bios/boot-helper-vexriscv.S [new file with mode: 0644]
litex/soc/software/bios/main.c
litex/soc/software/bios/sdram.c
litex/soc/software/include/base/csr-defs.h [new file with mode: 0644]
litex/soc/software/include/base/irq.h
litex/soc/software/include/base/system.h
litex/soc/software/libbase/crt0-vexriscv.S [new file with mode: 0644]
litex/soc/software/libbase/system.c
litex/soc/tools/mkmscimg.py