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(parent: aa48201) | patch
swr/rast: add cvt instructions in x86 lowering pass
authorGeorge Kyriazis <george.kyriazis@intel.com>
Thu, 5 Apr 2018 22:51:02 +0000 (17:51 -0500)
committerGeorge Kyriazis <george.kyriazis@intel.com>
Wed, 18 Apr 2018 15:51:38 +0000 (10:51 -0500)
commit670a99c233541b21420151f3c664dad712287457
tree1c432582e7260ca3978cdd0257941ba72450d560tree
parentaa482014e542de21785b2a4386ebbfc4a8e8df1dcommit | diff
swr/rast: add cvt instructions in x86 lowering pass

Support generic VCVTPD2PS and VCVTPH2PS in x86 lowering pass.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
src/gallium/drivers/swr/rasterizer/codegen/gen_llvm_ir_macros.py diff | blob | history
src/gallium/drivers/swr/rasterizer/jitter/builder_mem.cpp diff | blob | history
src/gallium/drivers/swr/rasterizer/jitter/builder_mem.h diff | blob | history
src/gallium/drivers/swr/rasterizer/jitter/fetch_jit.cpp diff | blob | history
src/gallium/drivers/swr/rasterizer/jitter/functionpasses/lower_x86.cpp diff | blob | history