inorder: cache instruction schedules
authorKorey Sewell <ksewell@umich.edu>
Sat, 12 Feb 2011 15:14:36 +0000 (10:14 -0500)
committerKorey Sewell <ksewell@umich.edu>
Sat, 12 Feb 2011 15:14:36 +0000 (10:14 -0500)
commit6713dbfe080df4dd04b0f29b5f2fbd6e221ffebf
tree9bc390854c24cf308f93fe7ab44928a8facaff59
parentaf67631790afbfeba01b05f7ae2ca54ae27428f1
inorder: cache instruction schedules
first step in a optimization to not dynamically allocate an instruction schedule
for every instruction but rather used cached schedules
src/cpu/inorder/cpu.cc
src/cpu/inorder/cpu.hh
src/cpu/inorder/pipeline_traits.hh