mem-ruby: Support device memories
authorMatthew Poremba <matthew.poremba@amd.com>
Wed, 27 May 2020 22:28:51 +0000 (17:28 -0500)
committerMatthew Poremba <matthew.poremba@amd.com>
Wed, 1 Jul 2020 14:38:11 +0000 (14:38 +0000)
commit675e01216d469cb2b3db95720560b0239abb2dad
treecf85404a14d3202978885d7372a5ce95af8b0a8c
parent187ffa5be88af1ab9b025c0f73578246d7d4b016
mem-ruby: Support device memories

Adds support for device memories in the system and RubySystem classes.
Devices may register memory ranges with the system class and packets
which originate from the device MasterID will update the device memory
in Ruby. In RubySystem functional access is updated to keep the packets
within the Ruby network they originated from.

Change-Id: I47850df1dc1994485d471ccd9da89e8d88eb0d20
JIRA: https://gem5.atlassian.net/browse/GEM5-470
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/29653
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
src/mem/ruby/network/Network.cc
src/mem/ruby/slicc_interface/AbstractController.cc
src/mem/ruby/slicc_interface/AbstractController.hh
src/mem/ruby/system/RubyPort.cc
src/mem/ruby/system/RubyPort.hh
src/mem/ruby/system/RubySystem.cc
src/mem/ruby/system/RubySystem.hh
src/mem/ruby/system/RubySystem.py
src/mem/slicc/symbols/StateMachine.py
src/sim/system.cc
src/sim/system.hh