projects / yosys.git / commit
| author | David Shah <dave@ds0.me> | |
| Fri, 18 Oct 2019 12:24:19 +0000 (13:24 +0100) | ||
| committer | David Shah <dave@ds0.me> | |
| Wed, 23 Oct 2019 10:47:37 +0000 (11:47 +0100) | ||
| commit | 6769d31ddbab341940af9b42b538fca60797fdf4 | |
| tree | a80cd15e8fdd3d4cf58ea30a7596c5d6a2a8b64b | tree |
| parent | f02623abb5d8338f034d7069844418af8912ab0f | commit | diff |
| techlibs/xilinx/Makefile.inc | diff | blob | history | |
| techlibs/xilinx/cells_xtra.py | diff | blob | history | |
| techlibs/xilinx/synth_xilinx.cc | diff | blob | history | |
| techlibs/xilinx/xc7_brams.txt | [deleted file] | blob | history |
| techlibs/xilinx/xc7_xcu_brams.txt | [new file with mode: 0644] | blob |
| techlibs/xilinx/xcu_brams_bb.v | [new file with mode: 0644] | blob |
| techlibs/xilinx/xcu_brams_map.v | [new file with mode: 0644] | blob |
| techlibs/xilinx/xcu_cells_xtra.v | diff | blob | history |