add unit test for Mem class, need to add misaligned ld/st
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 30 Dec 2022 13:18:21 +0000 (13:18 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 2 Jun 2023 18:51:16 +0000 (19:51 +0100)
commit676b8f55887e8e04f34ee00b065098b29c8f25bb
tree96d521c15788250d5216c21aa390ebf319187ce0
parent9572d3372fa3cd9174b6f27de4ad2d5cdbe7d133
add unit test for Mem class, need to add misaligned ld/st
src/openpower/decoder/isa/test_mem.py [new file with mode: 0644]