i965: Set SURFACE_STATE vertical alignment bit on Ivybridge.
authorKenneth Graunke <kenneth@whitecape.org>
Wed, 23 Nov 2011 12:13:23 +0000 (04:13 -0800)
committerKenneth Graunke <kenneth@whitecape.org>
Tue, 6 Dec 2011 23:14:56 +0000 (15:14 -0800)
commit6781fd05e9ea2ba45a615dacafca57291a220bb0
tree21ad682e922ee1d0e6e91b7abed717d24e8b7aa2
parent941989483543bc6d24c2df166362f6b6fb4a4062
i965: Set SURFACE_STATE vertical alignment bit on Ivybridge.

See intel_vertical_texture_alignment_unit() in intel_tex_layout.c;
certain surface types require setting this to VALIGN_4.

Analogous to commit dd0e46c4102976b7d317104ecd1bb565ac34613a on Gen6.

Fixes piglit test fbo-generatemipmap-formats with the
GL_ARB_depth_texture and GL_EXT_packed_depth_stencil arguments.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c