Added Verilog backend $dffsr support
authorClifford Wolf <clifford@clifford.at>
Wed, 18 Mar 2015 07:01:37 +0000 (08:01 +0100)
committerClifford Wolf <clifford@clifford.at>
Wed, 18 Mar 2015 07:01:37 +0000 (08:01 +0100)
commit67e6dcd34a3cb1373a9c64d30a29ec807158af38
tree24bcc3443a19f54b12eff1c31adb282d98711dc6
parent6c8fdb18295fa173395a8bc13540917ffb42d897
Added Verilog backend $dffsr support
backends/verilog/verilog_backend.cc