ARM: Ignore/warn when CSSELR or CCSIDR are accessed.
authorGabe Black <gblack@eecs.umich.edu>
Wed, 2 Jun 2010 17:58:09 +0000 (12:58 -0500)
committerGabe Black <gblack@eecs.umich.edu>
Wed, 2 Jun 2010 17:58:09 +0000 (12:58 -0500)
commit68f2908a70ae2582804fc9c6bb19d60e7d321324
treef8cf3a6b935052723a8e35b0d8ea444c45b192a6
parent741b24326040cfdd534d05ca46ba4c962bab18f1
ARM: Ignore/warn when CSSELR or CCSIDR are accessed.

These registers provide information about the caches. Since we can't provide
that information, these will be harmlessly inert.
src/arch/arm/isa.hh
src/arch/arm/miscregs.hh