projects / yosys.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: c9ab188) | patch
synth_xilinx to use shregmap with -params too
authorEddie Hung <eddieh@ece.ubc.ca>
Thu, 28 Feb 2019 18:21:05 +0000 (10:21 -0800)
committerEddie Hung <eddieh@ece.ubc.ca>
Thu, 28 Feb 2019 18:21:05 +0000 (10:21 -0800)
commit68f38f2ee0e82ac7250e8c4b257e33fd62d21544
treef645c4053dfb8095b8b74d2f9736b072bdb434d6tree
parentc9ab18889a63f74534c6fe9184ccb32e3661ab90commit | diff
synth_xilinx to use shregmap with -params too
techlibs/xilinx/cells_map.v diff | blob | history
techlibs/xilinx/synth_xilinx.cc diff | blob | history