i965/disasm: Improve disassembly of jump targets on Gen6+.
authorKenneth Graunke <kenneth@whitecape.org>
Sun, 29 Jun 2014 00:26:13 +0000 (17:26 -0700)
committerKenneth Graunke <kenneth@whitecape.org>
Mon, 30 Jun 2014 21:05:27 +0000 (14:05 -0700)
commit6928959d8eba05b8a7d62d8829472ddc298bc8d1
treecd77f225f58e9e0e7f76d5f70082be300dc6c942
parent6497890bf426699c5a03b22eadc509808f31373f
i965/disasm: Improve disassembly of jump targets on Gen6+.

Previously, flow control instructions generated output like:

(+f0) if(8) 12 8  null         0x000c0008UD { align16 WE_normal 1Q };

which included a dissasembly of the register fields, even though those
are meaningless for flow control instructions---those bits are reused
for another purpose.

It also wasn't immediately obvious which number was UIP and which was
JIP.

With this patch, we instead output:

(+f0) if(8)       JIP: 8       UIP: 12      { align16 WE_normal 1Q };

which is much clearer.

The patch also introduces has_uip/has_jip helper functions which clear
up a some generation/opcode checking mess.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
src/mesa/drivers/dri/i965/brw_disasm.c