projects / litex.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 912573f) | patch
remane GenSoC to SoC (more coherent and we will add support for multiple SoCs with...
authorFlorent Kermarrec <florent@enjoy-digital.fr>
Sat, 28 Feb 2015 10:36:15 +0000 (11:36 +0100)
committerFlorent Kermarrec <florent@enjoy-digital.fr>
Sat, 28 Feb 2015 10:36:15 +0000 (11:36 +0100)
commit69e869893d8dc48170bd3f4b08524fbf0f9db058
treed034648a88bd0425a892b6c069d9c3046908d974tree
parent912573f5c968af057ad336e0e49ffe38eddc43a2commit | diff
remane GenSoC to SoC (more coherent and we will add support for multiple SoCs with their own Wisbbone/CSR buses in the future)
14 files changed:
make.py diff | blob | history
misoclib/com/liteeth/example_designs/targets/base.py diff | blob | history
misoclib/gensoc/__init__.py [deleted file] blob | history
misoclib/gensoc/cpuif.py [deleted file] blob | history
misoclib/mem/litesata/example_designs/targets/bist.py diff | blob | history
misoclib/soc/__init__.py [new file with mode: 0644] blob
misoclib/soc/cpuif.py [new file with mode: 0644] blob
misoclib/tools/litescope/example_designs/targets/simple.py diff | blob | history
targets/de0nano.py diff | blob | history
targets/kc705.py diff | blob | history
targets/mlabs_video.py diff | blob | history
targets/pipistrello.py diff | blob | history
targets/ppro.py diff | blob | history
targets/simple.py diff | blob | history