add FP LOAD bit-reversed operations to ISACaller simulator
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 17 Jul 2021 12:07:40 +0000 (13:07 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 17 Jul 2021 12:07:40 +0000 (13:07 +0100)
commit69fb5156f5fab27b9f29d404334de010150d1452
tree4f4921afd2d40d37295d805b5d546577495608fa
parentfe7fecd060cc24b210f37f9513ec8fe0dd97bff9
add FP LOAD bit-reversed operations to ISACaller simulator
openpower/isa/svfpload.mdwn [new file with mode: 0644]
src/openpower/decoder/isa/test_caller_svp64_fft.py
src/openpower/decoder/isa/test_caller_svp64_ldst.py
src/openpower/sv/trans/svp64.py