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(parent: fa7ac6c) | patch
gen/sim/vcd: allow continous update of vcd file and dynamic signals
authorFlorent Kermarrec <florent@enjoy-digital.fr>
Sat, 28 May 2016 08:25:48 +0000 (10:25 +0200)
committerFlorent Kermarrec <florent@enjoy-digital.fr>
Sat, 28 May 2016 08:25:48 +0000 (10:25 +0200)
commit6a35337a095eb023190f99cf82510b43634102c5
tree9d3a390b23eeb06527fb4bc188e2b16046be833btree
parentfa7ac6c9a2ac61841e19002212ee4b5a7ab20e6fcommit | diff
gen/sim/vcd: allow continous update of vcd file and dynamic signals

With continous update, VCD header needs to be writen at the beginning of the simulation.
When a new signal is created, we rewrite the header and the content.
litex/gen/sim/vcd.py diff | blob | history