riscv: print .2byte or .4byte before an unknown instruction encoding
authorAndrew Burgess <andrew.burgess@embecosm.com>
Sat, 18 Sep 2021 09:42:41 +0000 (10:42 +0100)
committerAndrew Burgess <andrew.burgess@embecosm.com>
Mon, 20 Sep 2021 08:45:34 +0000 (09:45 +0100)
commit6a7f57668afcd841e8fc6b507a27bb20e9209fa9
treedcf2fb8b5648e7ee4b608dd7be16cf37e4b4eb71
parentd467335403fda3c4774e27d9725b3528e1799398
riscv: print .2byte or .4byte before an unknown instruction encoding

When the RISC-V disassembler encounters an unknown instruction, it
currently just prints the value of the bytes, like this:

  Dump of assembler code for function custom_insn:
     0x00010132 <+0>: addi sp,sp,-16
     0x00010134 <+2>: sw s0,12(sp)
     0x00010136 <+4>: addi s0,sp,16
     0x00010138 <+6>: 0x52018b
     0x0001013c <+10>: 0x9c45

My proposal, in this patch, is to change the behaviour to this:

  Dump of assembler code for function custom_insn:
     0x00010132 <+0>: addi sp,sp,-16
     0x00010134 <+2>: sw s0,12(sp)
     0x00010136 <+4>: addi s0,sp,16
     0x00010138 <+6>: .4byte 0x52018b
     0x0001013c <+10>: .2byte 0x9c45

Adding the .4byte and .2byte opcodes.  The benefit that I see here is
that in the patched version of the tools, the disassembler output can
be fed back into the assembler and it should assemble to the same
binary format.  Before the patch, the disassembler output is invalid
assembly.

I've started a RISC-V specific test file under binutils so that I can
add a test for this change.

binutils/ChangeLog:

* testsuite/binutils-all/riscv/riscv.exp: New file.
* testsuite/binutils-all/riscv/unknown.d: New file.
* testsuite/binutils-all/riscv/unknown.s: New file.

opcodes/ChangeLog:

* riscv-dis.c (riscv_disassemble_insn): Print a .%dbyte opcode
before an unknown instruction, '%d' is replaced with the
instruction length.
binutils/ChangeLog
binutils/testsuite/binutils-all/riscv/riscv.exp [new file with mode: 0644]
binutils/testsuite/binutils-all/riscv/unknown.d [new file with mode: 0644]
binutils/testsuite/binutils-all/riscv/unknown.s [new file with mode: 0644]
opcodes/ChangeLog
opcodes/riscv-dis.c