ARM: Fix checkpoint restoration into O3 CPU and the way O3 switchCpu works.
authorAli Saidi <Ali.Saidi@ARM.com>
Mon, 4 Apr 2011 16:42:28 +0000 (11:42 -0500)
committerAli Saidi <Ali.Saidi@ARM.com>
Mon, 4 Apr 2011 16:42:28 +0000 (11:42 -0500)
commit6b6989049383b67a2daef562a0319421ff1a8067
treea5139ef0015d25e2bbf246ddfed1939c35fbf2d0
parentf926fa77112c53ef8444657e89d4f00f559fd61c
ARM: Fix checkpoint restoration into O3 CPU and the way O3 switchCpu works.

This change fixes a small bug in the arm copyRegs() code where some registers
wouldn't be copied if the processor was in a mode other than MODE_USER.
Additionally, this change simplifies the way the O3 switchCpu code works by
utilizing TheISA::copyRegs() to copy the required context information
rather than the adhoc copying that goes on in the CPU model. The current code
makes assumptions about the visibility of int and float registers that aren't
true for all architectures in FS mode.
src/arch/arm/isa.cc
src/arch/arm/miscregs.hh
src/arch/arm/utility.cc
src/cpu/o3/thread_context_impl.hh