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(parent: 620aded) | patch
radeonsi: use a clever alignment for constant buffer uploads
authorMarek Olšák <marek.olsak@amd.com>
Wed, 15 Feb 2017 17:22:27 +0000 (18:22 +0100)
committerMarek Olšák <marek.olsak@amd.com>
Sat, 18 Feb 2017 00:22:08 +0000 (01:22 +0100)
commit6b73aafceb1eb8e81754e2f349826994de678466
tree8867b645888363ea28c3e1f87ac270ead32403catree
parent620aded541a5b81df74575888754094fea2f2ae2commit | diff
radeonsi: use a clever alignment for constant buffer uploads

This results in a very tiny decrease in lgkm wait cycles.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
src/gallium/drivers/radeon/radeon_winsys.h diff | blob | history
src/gallium/drivers/radeonsi/si_descriptors.c diff | blob | history
src/gallium/drivers/radeonsi/si_pipe.h diff | blob | history
src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c diff | blob | history
src/gallium/winsys/radeon/drm/radeon_drm_winsys.c diff | blob | history