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(parent: 83029f7) | patch
RISC-V: Improve "bits undefined" diagnostics
authorTsukasa OI <research_trasio@irq.a4lg.com>
Tue, 28 Jun 2022 10:07:52 +0000 (19:07 +0900)
committerTsukasa OI <research_trasio@irq.a4lg.com>
Fri, 28 Oct 2022 14:17:34 +0000 (14:17 +0000)
commit6b84c098e533f87d7973fd6fe8a39ee97255ebdb
treeba56a5585518038f476d3a7e6a4b216e67f0be1etree
parent83029f7ff5d571dff0190e8d92c26e032c7acd76commit | diff
RISC-V: Improve "bits undefined" diagnostics

This commit improves internal error message
"internal: bad RISC-V opcode (bits 0x%lx undefined): %s %s"
to display actual unused bits (excluding non-instruction bits).

gas/ChangeLog:

* config/tc-riscv.c (validate_riscv_insn): Exclude non-
instruction bits from displaying internal diagnostics.
Change error message slightly.
gas/config/tc-riscv.c diff | blob | history