anv: Flush caches prior to PIPELINE_SELECT on all gens
authorJason Ekstrand <jason@jlekstrand.net>
Wed, 15 Mar 2017 18:58:52 +0000 (11:58 -0700)
committerJason Ekstrand <jason.ekstrand@intel.com>
Tue, 28 Mar 2017 21:57:08 +0000 (14:57 -0700)
commit6baae9625d26d282a72481598f9431fcad3211f6
tree952fbf255ec64b3a11afe17e8f5a392c0eeb395d
parent0fe3dcce4c3e8b86a60beefe4c5adc760f2d59f8
anv: Flush caches prior to PIPELINE_SELECT on all gens

The programming note that says we need to do this still exists in the
SkyLake PRM and, from looking at the bspec, seems like it may apply to
all hardware generations SNB+.  Unfortunately, this isn't particularly
clear cut since there is also language in the bspec that says you can
skip the flushing and stall to get better throughput.  Experimentation
with the "Car Chase" benchmark in GL seems to indicate that some form of
flushing is still needed.  This commit makes us do the full set of
flushes regardless of hardware generation.  We can always reduce the
flushing later.

Reported-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Cc: "17.0 13.0" <mesa-stable@lists.freedesktop.org>
src/intel/vulkan/genX_cmd_buffer.c