projects / mesa.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: d3d0fe4) | patch
i965/gen10: Enable float blend optimization
authorAnuj Phogat <anuj.phogat@gmail.com>
Tue, 31 Oct 2017 16:28:09 +0000 (09:28 -0700)
committerAnuj Phogat <anuj.phogat@gmail.com>
Fri, 3 Nov 2017 21:30:34 +0000 (14:30 -0700)
commit6c681b4cc1aab20f280dfce88d77896b64588144
tree54b239254366220d4cbaf9481e0d67727ecd7e8ftree
parentd3d0fe4572f62474b86ef3a68405046c68b54062commit | diff
i965/gen10: Enable float blend optimization

This optimization is enabled for previous generations too.
See Mesa commit c17e214a6b
On CNL this bit has been moved to CACHE_MODE_SS register.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
src/mesa/drivers/dri/i965/brw_defines.h diff | blob | history
src/mesa/drivers/dri/i965/brw_state_upload.c diff | blob | history