Fixed trailing whitespaces
authorClifford Wolf <clifford@clifford.at>
Thu, 2 Jul 2015 09:14:30 +0000 (11:14 +0200)
committerClifford Wolf <clifford@clifford.at>
Thu, 2 Jul 2015 09:14:30 +0000 (11:14 +0200)
commit6c84341f22b2758181164e8d5cddd23e3589c90b
tree0438ad9becf956e43ebf8665fee89e021b13bcdf
parent053058d78167f7f1ec377fddcee8b648a5ae4138
Fixed trailing whitespaces
195 files changed:
README
backends/blif/blif.cc
backends/btor/README
backends/btor/btor.cc
backends/btor/verilog2btor.sh
backends/edif/edif.cc
backends/ilang/ilang_backend.cc
backends/ilang/ilang_backend.h
backends/intersynth/intersynth.cc
backends/json/json.cc
backends/smt2/smt2.cc
backends/smv/smv.cc
backends/spice/spice.cc
backends/verilog/verilog_backend.cc
frontends/ast/ast.cc
frontends/ast/ast.h
frontends/ast/dpicall.cc
frontends/ast/genrtlil.cc
frontends/ast/simplify.cc
frontends/blif/blifparse.cc
frontends/blif/blifparse.h
frontends/ilang/ilang_frontend.cc
frontends/ilang/ilang_frontend.h
frontends/ilang/ilang_lexer.l
frontends/ilang/ilang_parser.y
frontends/liberty/liberty.cc
frontends/verific/verific.cc
frontends/verilog/const2ast.cc
frontends/verilog/preproc.cc
frontends/verilog/verilog_frontend.cc
frontends/verilog/verilog_frontend.h
frontends/verilog/verilog_lexer.l
frontends/verilog/verilog_parser.y
frontends/vhdl2verilog/vhdl2verilog.cc
kernel/bitpattern.h
kernel/calc.cc
kernel/cellaigs.cc
kernel/cellaigs.h
kernel/celltypes.h
kernel/consteval.h
kernel/cost.h
kernel/driver.cc
kernel/hashlib.h
kernel/log.cc
kernel/log.h
kernel/macc.h
kernel/modtools.h
kernel/register.cc
kernel/register.h
kernel/rtlil.cc
kernel/rtlil.h
kernel/satgen.h
kernel/sigtools.h
kernel/utils.h
kernel/yosys.cc
kernel/yosys.h
libs/ezsat/demo_bit.cc
libs/ezsat/demo_cmp.cc
libs/ezsat/demo_vec.cc
libs/ezsat/ezminisat.cc
libs/ezsat/ezminisat.h
libs/ezsat/ezsat.cc
libs/ezsat/ezsat.h
libs/ezsat/puzzle3d.cc
libs/ezsat/testbench.cc
libs/subcircuit/README
libs/subcircuit/subcircuit.cc
libs/subcircuit/subcircuit.h
libs/subcircuit/test_large.spl
manual/APPNOTE_010_Verilog_to_BLIF.tex
manual/APPNOTE_011_Design_Investigation.tex
manual/APPNOTE_012_Verilog_to_BTOR.tex
manual/CHAPTER_Appnotes.tex
manual/CHAPTER_Basics.tex
manual/CHAPTER_Eval/grep-it.sh
manual/CHAPTER_Intro.tex
manual/CHAPTER_Optimize.tex
manual/CHAPTER_Overview.tex
manual/CHAPTER_Prog/stubnets.cc
manual/CHAPTER_StateOfTheArt/simlib_hana.v
manual/CHAPTER_StateOfTheArt/simlib_yosys.v
manual/CHAPTER_Verilog.tex
manual/PRESENTATION_ExAdv.tex
manual/PRESENTATION_ExAdv/addshift_map.v
manual/PRESENTATION_ExAdv/red_or3x1_map.v
manual/PRESENTATION_ExAdv/sym_mul_map.v
manual/PRESENTATION_ExOth.tex
manual/PRESENTATION_ExSyn.tex
manual/PRESENTATION_Intro/counter.ys
manual/PRESENTATION_Prog.tex
manual/command-reference-manual.tex
misc/yosysjs/yosysjs.js
passes/cmds/add.cc
passes/cmds/check.cc
passes/cmds/connect.cc
passes/cmds/connwrappers.cc
passes/cmds/copy.cc
passes/cmds/delete.cc
passes/cmds/design.cc
passes/cmds/rename.cc
passes/cmds/scatter.cc
passes/cmds/scc.cc
passes/cmds/select.cc
passes/cmds/setattr.cc
passes/cmds/setundef.cc
passes/cmds/show.cc
passes/cmds/splice.cc
passes/cmds/splitnets.cc
passes/cmds/stat.cc
passes/equiv/equiv_add.cc
passes/equiv/equiv_induct.cc
passes/equiv/equiv_make.cc
passes/equiv/equiv_miter.cc
passes/equiv/equiv_remove.cc
passes/equiv/equiv_simple.cc
passes/equiv/equiv_status.cc
passes/fsm/fsm.cc
passes/fsm/fsm_detect.cc
passes/fsm/fsm_expand.cc
passes/fsm/fsm_export.cc
passes/fsm/fsm_extract.cc
passes/fsm/fsm_info.cc
passes/fsm/fsm_map.cc
passes/fsm/fsm_opt.cc
passes/fsm/fsm_recode.cc
passes/fsm/fsmdata.h
passes/hierarchy/hierarchy.cc
passes/hierarchy/submod.cc
passes/memory/memory.cc
passes/memory/memory_bram.cc
passes/memory/memory_collect.cc
passes/memory/memory_dff.cc
passes/memory/memory_map.cc
passes/memory/memory_share.cc
passes/memory/memory_unpack.cc
passes/opt/Makefile.inc
passes/opt/opt.cc
passes/opt/opt_clean.cc
passes/opt/opt_const.cc
passes/opt/opt_muxtree.cc
passes/opt/opt_reduce.cc
passes/opt/opt_rmdff.cc
passes/opt/opt_share.cc
passes/opt/share.cc
passes/opt/wreduce.cc
passes/proc/proc.cc
passes/proc/proc_arst.cc
passes/proc/proc_clean.cc
passes/proc/proc_dff.cc
passes/proc/proc_dlatch.cc
passes/proc/proc_init.cc
passes/proc/proc_mux.cc
passes/proc/proc_rmdead.cc
passes/sat/eval.cc
passes/sat/expose.cc
passes/sat/freduce.cc
passes/sat/miter.cc
passes/sat/sat.cc
passes/techmap/abc.cc
passes/techmap/aigmap.cc
passes/techmap/alumacc.cc
passes/techmap/dff2dffe.cc
passes/techmap/dffinit.cc
passes/techmap/dfflibmap.cc
passes/techmap/extract.cc
passes/techmap/hilomap.cc
passes/techmap/iopadmap.cc
passes/techmap/libparse.cc
passes/techmap/libparse.h
passes/techmap/maccmap.cc
passes/techmap/muxcover.cc
passes/techmap/pmuxtree.cc
passes/techmap/simplemap.cc
passes/techmap/simplemap.h
passes/techmap/techmap.cc
passes/tests/test_autotb.cc
techlibs/cmos/counter.v
techlibs/common/simcells.v
techlibs/common/simlib.v
techlibs/common/synth.cc
techlibs/common/techmap.v
techlibs/ice40/arith_map.v
techlibs/ice40/cells_sim.v
techlibs/ice40/ice40_ffssr.cc
techlibs/ice40/ice40_opt.cc
techlibs/ice40/synth_ice40.cc
techlibs/xilinx/arith_map.v
techlibs/xilinx/brams.txt
techlibs/xilinx/synth_xilinx.cc
tests/fsm/generate.py
tests/realmath/generate.py
tests/share/generate.py
tests/simple/loops.v
tests/simple/mem2reg.v
tests/simple/omsp_dbg_uart.v