Merge pull request #827 from ucb-bar/firrtlfixes
authorClifford Wolf <clifford@clifford.at>
Thu, 28 Feb 2019 22:45:04 +0000 (14:45 -0800)
committerGitHub <noreply@github.com>
Thu, 28 Feb 2019 22:45:04 +0000 (14:45 -0800)
commit6d143c9a018e5ba352a06785afeba8d50178a835
tree99a407c011ff773195f889cd04926ec0f5f1a3c1
parent64d91219b4e81366976a0e0a9b28efa4bd825022
parent171c425cf9addb61ef3f03596fd26355ed8af76d
Merge pull request #827 from ucb-bar/firrtlfixes

Fix FIRRTL to Verilog process instance subfield assignment.