Fix handling of "logic" variables with initial value
authorClifford Wolf <clifford@clifford.at>
Wed, 19 Jun 2019 09:25:11 +0000 (11:25 +0200)
committerClifford Wolf <clifford@clifford.at>
Wed, 19 Jun 2019 09:25:11 +0000 (11:25 +0200)
commit6d64e242ba8214f7bceb35f688b544f56d49cea1
treec7ca0f0d864573f73f4d1c6c86000debef42059c
parentb3441935b1e5fd59e982870c2aa4da6036b6f30e
Fix handling of "logic" variables with initial value

Signed-off-by: Clifford Wolf <clifford@clifford.at>
frontends/verilog/verilog_parser.y