Various changes to I/O, addition of PciFake device to improve FreeBSD compatibility.
authorBenjamin Nash <benash@umich.edu>
Tue, 26 Jul 2005 16:28:33 +0000 (12:28 -0400)
committerBenjamin Nash <benash@umich.edu>
Tue, 26 Jul 2005 16:28:33 +0000 (12:28 -0400)
commit6e0ad62fdc8c0518e54366e3bca25e75335f3198
treef594828e38b1668ac55c6716564f8ac4955ae8fa
parent32b52fe7126091692c0a76314bb3692fa3f70d27
Various changes to I/O, addition of PciFake device to improve FreeBSD compatibility.

SConscript:
    Include pcifake.cc, fix spacing.
dev/ide_ctrl.cc:
    Consolidate switch-case blocks.
dev/ide_disk.cc:
    Add comments.
dev/pciconfigall.cc:
    Adjust spacing.
dev/pcidev.cc:
    Adjust spacing, rearrange code.
dev/tsunami_io.cc:
    Rearrange code.
dev/uart8250.cc:
    Switch uart interrupt interval back to original value.
python/m5/objects/Pci.py:
    Add PciFake class to be used as a PCI-ISA bridge device.

--HG--
extra : convert_revision : 8aea94318510079a310377f297aa161ba5f7864c
SConscript
dev/ide_ctrl.cc
dev/ide_disk.cc
dev/pciconfigall.cc
dev/pcidev.cc
dev/tsunami_io.cc
dev/uart8250.cc
python/m5/objects/Pci.py