i965/skl: Use 1 register for uniform pull constant payload
authorBen Widawsky <benjamin.widawsky@intel.com>
Thu, 19 Feb 2015 23:49:34 +0000 (15:49 -0800)
committerBen Widawsky <benjamin.widawsky@intel.com>
Sun, 22 Feb 2015 20:27:35 +0000 (12:27 -0800)
commit6e62a52865787362ae1deb9dee80140d3a66c519
tree54959c968c344ab9ab27b691c56a90f6793e1203
parent4359954d842caa2a9f8d4b50d70ecc789884b68b
i965/skl: Use 1 register for uniform pull constant payload

When under dispatch_width=16 the previous code would allocate 2 registers for
the payload when only one is needed. This manifested itself through bugs on SKL
which needs to mess with this instruction.

Ken though this might impact shader-db, but apparently it doesn't

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89118
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88999
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Timo Aaltonen <timo.aaltonen@canonical.com>
src/mesa/drivers/dri/i965/brw_fs.cpp