pipistrello: fix FPGA speed grade
authorYann Sionneau <ys@m-labs.hk>
Sun, 14 Jun 2015 21:19:27 +0000 (23:19 +0200)
committerYann Sionneau <ys@m-labs.hk>
Sun, 14 Jun 2015 21:19:27 +0000 (23:19 +0200)
commit6e876c63ad580cb9643b529cf201b741a58219e3
tree5993422177797d6fcca7caf74a0b9b898e080e02
parent33b536e505f0cdd3f0921d9fe6a7158140397e5e
pipistrello: fix FPGA speed grade
mibuild/platforms/pipistrello.py