arch-arm: inform bootloader of kernel position with a register
authorCiro Santilli <ciro.santilli@arm.com>
Mon, 21 Sep 2020 16:11:59 +0000 (17:11 +0100)
committerCiro Santilli <ciro.santilli@arm.com>
Wed, 13 Jan 2021 11:32:19 +0000 (11:32 +0000)
commit6ecf110b06d7333aae13bcc16216cc127fdda7f0
tree43963bca136a6f67eb96e4ea10414f3f5a7a97cf
parenteb4382af0ec1e417891aac33b2febd413e0b90b5
arch-arm: inform bootloader of kernel position with a register

Before the commit, the bootloader had a hardcoded entry point that it
would jump to.

However, the Linux kernel arm64 v5.8 forced us to change the kernel
entry point because the required memory alignment has changed at:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
commit/?h=v5.8&id=cfa7ede20f133cc81cef01dc3a516dda3a9721ee

Therefore the only way to have a single bootloader that boots both
pre-v5.8 and post-v5.8 kernels is to pass that information from gem5
to the bootloader, which we do in this patch via registers.

This approach was already used by the 32-bit bootloader, which passed
that value via r3, and we try to use the same register x3 in 64-bit.

Since we are now passing this information, the this patch also removes
the hardcoding of DTB and cpu-release-addr, and also passes those
values via registers.

We store the cpu-release-addr in x5 as that value appears to have a
function similar to flags_addr, which is used only in 32-bit arm and
gets stored in r5.

This commit renames atags_addr to dtb_addr, since both are mutually
exclusive, and serve a similar purpose, DTB being the newer recommended
approach.

Similarly, flags_addr is renamed to cpu_release_addr, and it is moved
from ArmSystem into ArmFsWorkload, since it is not an intrinsic system
property, and should be together with dtb_addr instead.

Before this commit, flags_addr was being set from FSConfig.py and
configs/example/arm/devices.py to self.realview.realview_io.pio_addr
+ 0x30. This commit moves that logic into RealView.py instead, and
sets the flags address 8 bytes before the start of the DTB address.

JIRA: https://gem5.atlassian.net/browse/GEM5-787
Change-Id: If70bea9690be04b84e6040e256a9b03e46710e10
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/35076
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
configs/common/FSConfig.py
configs/example/arm/devices.py
configs/example/arm/workloads.py
src/arch/arm/ArmFsWorkload.py
src/arch/arm/ArmSystem.py
src/arch/arm/freebsd/fs_workload.cc
src/arch/arm/fs_workload.cc
src/arch/arm/linux/fs_workload.cc
src/dev/arm/RealView.py
system/arm/bootloader/arm64/boot.S
system/arm/bootloader/arm64/makefile