RISC-V: Zvkh[a,b]: Remove individual instruction class
authorChristoph Müllner <christoph.muellner@vrull.eu>
Mon, 3 Jul 2023 10:10:47 +0000 (12:10 +0200)
committerNelson Chu <nelson@rivosinc.com>
Mon, 3 Jul 2023 10:17:59 +0000 (18:17 +0800)
commit704b30cbb2beeac1e90c4ee6f1f5b9f1dc2e5ee4
treeb05368971f51c38351e0044d3b9199254bc75e02
parentd501d384886673b7c3981fe225b2d7719440abda
RISC-V: Zvkh[a,b]: Remove individual instruction class

Currently we have three instruction classes defined for Zvkh[a,b]:
- INSN_CLASS_ZVKNHA
- INSN_CLASS_ZVKNHB
- INSN_CLASS_ZVKNHA_OR_ZVKNHB

The encodings of all instructions in Zvknh[a,b] are identical.
Therefore, we don't need the individual instruction classes
and can remove them.

This patch also adds the missing support of the combined instruction
class in riscv_multi_subset_supports_ext().

Fixes: 62edb233ef5 ("RISC-V: Add support for the Zvknh[a,b] ISA extensions")
Reported-By: Nelson Chu <nelson@rivosinc.com>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
bfd/elfxx-riscv.c
include/opcode/riscv.h