vc4: Interleave register allocation from regfile A and B.

vc4: Interleave register allocation from regfile A and B.

The register allocator prefers low-index registers from vc4_regs[] in the
configuration we're using, which is good because it means we prioritize
allocating the accumulators (which are faster).  On the other hand, it was
causing raddr conflicts because everything beyond r0-r2 ended up in
regfile A until you got massive register pressure.  By interleaving, we
end up getting more instruction pairing from getting non-conflicting
raddrs and QPU_WSes.

total instructions in shared programs: 55957 -> 52719 (-5.79%)
instructions in affected programs:     46855 -> 43617 (-6.91%)