[ARC] Fix ARC target specific tests.
authorClaudiu Zissulescu <claziss@synopsys.com>
Fri, 22 Nov 2019 07:59:54 +0000 (08:59 +0100)
committerClaudiu Zissulescu <claziss@gcc.gnu.org>
Fri, 22 Nov 2019 07:59:54 +0000 (08:59 +0100)
commit713877cbd73783fac1a1013cefd24cc273bb4635
treec3b5550ab2ffe8344474dbccb1c3c093b329a1e4
parent7028c2179cc349653c5578fb5774389b1fffdaf1
[ARC] Fix ARC target specific tests.

Fix ARC specific tests by improving the matching pattern and adding
the missing functionality in arc.exp

gcc/tests
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>

* gcc.target/arc/add_n-combine.c: Match add1/2/3 instruction in
output assembly.
* gcc.target/arc/arc.exp (check_effective_target_codedensity):
Add.
* gcc.target/arc/cmem-7.c: Fix matching patterns.
* gcc.target/arc/cmem-bit-1.c: Likewise.
* gcc.target/arc/cmem-bit-2.c: Likewise.
* gcc.target/arc/cmem-bit-3.c: Likewise.
* gcc.target/arc/cmem-bit-4.c: Likewise.
* gcc.target/arc/interrupt-2.c: Match rtie insn for A7.
* gcc.target/arc/store-merge-1.c: This test is only meaningful for
architectures with double load/store operations.

From-SVN: r278609
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/arc/add_n-combine.c
gcc/testsuite/gcc.target/arc/arc.exp
gcc/testsuite/gcc.target/arc/cmem-7.c
gcc/testsuite/gcc.target/arc/cmem-bit-1.c
gcc/testsuite/gcc.target/arc/cmem-bit-2.c
gcc/testsuite/gcc.target/arc/cmem-bit-3.c
gcc/testsuite/gcc.target/arc/cmem-bit-4.c
gcc/testsuite/gcc.target/arc/interrupt-2.c
gcc/testsuite/gcc.target/arc/store-merge-1.c