Set the MABI and MArch of the riscv target.
authorSergiusz Bazanski <q3k@q3k.org>
Mon, 22 Jan 2018 18:20:42 +0000 (18:20 +0000)
committerSergiusz Bazanski <q3k@q3k.org>
Mon, 22 Jan 2018 18:50:26 +0000 (18:50 +0000)
commit7176492231158d562b6fc1fde7d942dd6bb25fa9
treebe35ea33e640dcb1cec6d1221cf19184e353347e
parent7ea5a26734771ab9f292085163dfaa489bb8fb66
Set the MABI and MArch of the riscv target.

Again, this should be tunable, and synchronized with the core settings.
litex/soc/integration/cpu_interface.py