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(parent: fceb766) | patch
add relevant pred source/dest mask bits and create appropriate zeroing
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 6 May 2021 17:51:33 +0000 (18:51 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 6 May 2021 17:51:33 +0000 (18:51 +0100)
commit72525d32c291de7e5e8e65af03181257d33d73a0
tree81f89e8070fcf4c39d605b78acacb54b72ad917ctree
parentfceb766a07dc1272d6a03fd024d07f44258084efcommit | diff
add relevant pred source/dest mask bits and create appropriate zeroing
signal for predicate source/dest
src/openpower/decoder/power_decoder2.py diff | blob | history