Merge pull request #718 from whitequark/gate2lut
authorClifford Wolf <clifford@clifford.at>
Wed, 5 Dec 2018 17:16:35 +0000 (09:16 -0800)
committerGitHub <noreply@github.com>
Wed, 5 Dec 2018 17:16:35 +0000 (09:16 -0800)
commit728a251a95d3c43d7fc6e439d0d9fbe6dac1bbc6
treec24ccc8fabbe0dbf74f00278900b866d7e6e0b32
parente1153031291275dc1c16445b1b2089ffd4335845
parentd9fa4387c97745c558acdd8ea7f436917302796e
Merge pull request #718 from whitequark/gate2lut

 gate2lut: new techlib, for converting Yosys gates to FPGA LUTs