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(parent: cf45f22) | patch
arch-riscv: initialize RISC-V's thread pointer register in clone syscall
authorTuan Ta <qtt2@cornell.edu>
Mon, 2 Apr 2018 20:21:28 +0000 (16:21 -0400)
committerTuan Ta <qtt2@cornell.edu>
Fri, 8 Feb 2019 15:25:30 +0000 (15:25 +0000)
commit72d1d2930fc2b8ef6d32ec2ce2eabbac00684159
tree30e4dff525d704bf39e446e1a9ee80ebb7418635tree
parentcf45f22369f85397f113918a4f773b2613f0e19bcommit | diff
arch-riscv: initialize RISC-V's thread pointer register in clone syscall

This patch initializes thread pointer register to Thread Local Storage
(TLS)'s pointer given to a clone system call.

Change-Id: I03e2cf4763e6a0ed31f357772a513a05e1e3461b
Reviewed-on: https://gem5-review.googlesource.com/c/9622
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Maintainer: Brandon Potter <Brandon.Potter@amd.com>
src/arch/riscv/linux/linux.hh diff | blob | history