Hi all,

Hi all,

This was committed following offline approval by Kyryl.

One minor intended optimisation introduced by :

https://gcc.gnu.org/ml/gcc-patches/2020-01/msg01237.html

was to set a preference for both __fp16 types and __bf16 types to be
loaded/stored directly into/from the FP/NEON registers (if they are available
and if the vld1.16 is compatible), rather than be passed through the regular
r-registers.

This would convert many observed instances of:

**	ldrh	r3, [r3]	@ __fp16
**	vmov.f16	s15, r3	@ __fp16

Into a single:

**	vld1.16	{d7[2]}, [r3]

This resulted in a regression of a dg-scan-assembler in a __fp16 test.

This patch updates the test to the same testing standard used by the BFloat
tests (use check-function-bodies to explicitly check for correct assembler
generated by each function) and updates it for the latest optimisation.

Cheers,
Stam

gcc/testsuite/ChangeLog:

2020-01-27  Stam Markianos-Wright  <stam.markianos-wright@arm.com>

	* gcc.target/arm/armv8_2-fp16-move-1.c: Update following load/store
        optimisation.