Add uart16550 files to yosys/nextpnr build
authorMichael Neuling <mikey@neuling.org>
Thu, 2 Jul 2020 04:34:43 +0000 (14:34 +1000)
committerMichael Neuling <mikey@neuling.org>
Thu, 2 Jul 2020 04:54:08 +0000 (14:54 +1000)
commit7347786b0859172de64ba7e3aa5abfda74a4c13a
treed103d401ef2bdb1b330a9befb3cd471d285b28fb
parentaae45583d73f74ed49e0b3946e87c759e3a1c922
Add uart16550 files to yosys/nextpnr build

These are verilog so need passed to yosys differently than the VHDL
files.

Signed-off-by: Michael Neuling <mikey@neuling.org>
Makefile