power: Add support for Radix Translation
authorPhanikiran Harithas <phanikiran.harithas@gmail.com>
Sun, 10 Jun 2018 12:15:05 +0000 (17:45 +0530)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 24 Jan 2021 03:57:54 +0000 (03:57 +0000)
commit73e59f716ae93238547dbf83feeceb9feb2e8789
tree20158658bd376cf814a4dd253c650bd6f245f04e
parent64d981681c354aaf444cd08f8dc33cbd6fdab1af
power: Add support for Radix Translation

Power ISA v3.0 introduces the Radix MMU in addition to the Hash MMU.

This patch adds support in gem5 for handling the Radix based address
translations when MSR[IR,DR] bits are set.

It also adds an example of a radix_walk.

Change-Id: I193f8d44f36b429997f7ffcb788a50544ba65a8c

Signed-off-by: Phanikiran Harithas <phanikiran.harithas@gmail.com>
Signed-off-by: Venkatnarayan Kulkarni <venkatnarayankulkarni@gmail.com>
Signed-off-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com>
configs/common/Benchmarks.py
configs/common/FSConfig.py
src/arch/power/PowerTLB.py
src/arch/power/SConscript
src/arch/power/isa/decoder.isa
src/arch/power/radix_walk_example.txt [new file with mode: 0644]
src/arch/power/radixwalk.cc [new file with mode: 0644]
src/arch/power/radixwalk.hh [new file with mode: 0644]
src/arch/power/tlb.cc
src/arch/power/tlb.hh
src/cpu/BaseCPU.py