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nir: Change bfm's semantics to match Intel/AMD/SM5.
authorMatt Turner <mattst88@gmail.com>
Fri, 8 Jan 2016 00:16:35 +0000 (16:16 -0800)
committerMatt Turner <mattst88@gmail.com>
Wed, 13 Jan 2016 19:22:40 +0000 (11:22 -0800)
commit74cff779eb5217fe2b791f2a23405096901f45fd
tree7ec2648c95a5ea3aaf12c8184cab1a2bc3a671b6tree
parenta5fcff6628c641d01954d0af4aee0e723a570cadcommit | diff
nir: Change bfm's semantics to match Intel/AMD/SM5.

Intel/AMD's hardware instructions do not handle arguments of 32.
Constant evaluation should not produce a result different from the
hardware instruction.

The s/1ull/1u/ change is intentional: previously we wanted defined
behavior for the "1 << 32" case, but we're making this case undefined so
we can make it 1u and save ourselves a 64-bit operation.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
src/glsl/nir/nir_opcodes.py diff | blob | history