Merge pull request #1703 from YosysHQ/eddie/specify_improve
authorEddie Hung <eddie@fpgeh.com>
Fri, 21 Feb 2020 17:15:17 +0000 (09:15 -0800)
committerGitHub <noreply@github.com>
Fri, 21 Feb 2020 17:15:17 +0000 (09:15 -0800)
commit760096e8d2e9e2431bd5f97034bbd4ba01326649
treef19ca177b826e856b117f9812900959dc4d6f14e
parentcd044a2bb6adf7a5e00d4a6c075e9489d852d733
parentea4bd161b68cda30b5300b9275ebc0723896be02
Merge pull request #1703 from YosysHQ/eddie/specify_improve

Improve specify parser
frontends/ast/genrtlil.cc
frontends/verilog/verilog_parser.y