i965/fs: Don't [un]spill multiple registers at a time in SIMD8 mode
authorJason Ekstrand <jason.ekstrand@intel.com>
Fri, 24 Oct 2014 18:37:55 +0000 (11:37 -0700)
committerJason Ekstrand <jason.ekstrand@intel.com>
Mon, 27 Oct 2014 20:35:57 +0000 (13:35 -0700)
commit76bb695f096667383597af78efd29dc466858dc6
tree6fd7c8012bb6666937adddb3c24f95d09ff18549
parent3a5df8b61272fe78badb195c267c04a9e78d920f
i965/fs: Don't [un]spill multiple registers at a time in SIMD8 mode

I thought this would be a clever way to make spilling less expensive.
However, it appears that the oword read/write messages we are using for
spilling ignore the execution size and assume SIMD16 whenever working with
more than one register.

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp