mem-cache: Fix recvTimingReq doWritebacks tick
authorDaniel R. Carvalho <odanrc@yahoo.com.br>
Thu, 29 Nov 2018 15:33:24 +0000 (16:33 +0100)
committerDaniel Carvalho <odanrc@yahoo.com.br>
Thu, 7 Mar 2019 13:07:09 +0000 (13:07 +0000)
commit7770e6a972d8dd8742724533fe4c4635d8aabf2c
tree71a270f66dda70cc28eb0a20403df1f708724d2c
parent97281129c9b24ce51d4c9ad2f5bba4b15c375e14
mem-cache: Fix recvTimingReq doWritebacks tick

Before being sent to the writebuffer, the evicted blocks
must be selected for replacement, and therefore the
access latency must be applied. The forward latency is
then applied on top of that delay.

Change-Id: I16a25a8bf6051f63eb7a02fe66acb6af26d434fc
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/14736
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
src/mem/cache/base.cc