test/axi: add AXILite2CSR and AXILiteSRAM tests
authorJędrzej Boczar <jboczar@antmicro.com>
Wed, 15 Jul 2020 10:30:28 +0000 (12:30 +0200)
committerJędrzej Boczar <jboczar@antmicro.com>
Wed, 15 Jul 2020 10:40:39 +0000 (12:40 +0200)
commit78a631f39262aebfe12c67438d7a19352a6dafb1
tree2421fc28ab85c823cb3bec53584f96493f9fc25a
parenta5be2cd2576a0d2ba5e5c1bd3a5a609bef7431eb
test/axi: add AXILite2CSR and AXILiteSRAM tests
litex/soc/interconnect/axi.py
test/test_axi.py